Ciresan-width MNIST: optimization results

Generated 2026-09-09T22:52:25.126458+00:00. Search finalized; outcomes remain test-monitored.

The target is the first observed 98.63% official-test accuracy (at most 137 errors out of 10,000). These runs fit the full 60,000-example training pool and monitor the test set after scheduled epochs. Recipe choices respond to test results: this is explicitly a test-target speed search, separate from the interrupted validation-only stochastic-depth study.

The public historical W&B run first and uniquely reached 98.63% at epoch 94 and 388.4867 seconds of logged W&B runtime, among 91 verified evaluations. Its GPU is unknown; its clock includes logging/evaluation and is not isolated training time. Historical source/clock gaps are documented in the history audit.

Selected recipes: all three confirmation seeds

The two selected linear-head, unit-dropout recipes are modified training recipes. They use B256, BF16 training, dropout 0.2, initial shrinkage 0.00008, and a factor 0.1 applied to both LR and shrinkage at epoch 21. Raw pixels use LR 0.004; normalized pixels (÷255) use LR 0.12. Seeds 101–103 differ from exploratory seed 1 but were also used in earlier recipe checks; the test set was already known and repeatedly monitored.

• raw-linear-dropout-step: 3/3 reached the target; observed training time 7.414–9.677s and invocation-to-score 15.807–20.551s. These ranges span the hardware listed below; they are not hardware-normalized recipe comparisons.
• normalized-dropout-step: 3/3 reached the target; observed training time 5.320–5.819s and invocation-to-score 14.897–17.236s. These ranges span the hardware listed below; they are not hardware-normalized recipe comparisons.

Only seed 102 has the same reported GPU (A100-SXM4-40GB) for both selected recipes; the other two pairs mix SXM4/PCIe or 40/80GB variants. Keep the per-run numbers rather than attributing a pooled difference entirely to input normalization or LR.

Confirmation check for raw-linear-dropout-step: 3/3 reached the target by 100 epochs. Seeds: [101, 102, 103]; outcomes: {'reached': 3}. Same-seed repeats are counted separately; stable-recipe seeds were reused from earlier raw/ReLU checks. This supports repeatability across these tested seeds; it does not undo test-target selection.

Confirmation check for normalized-dropout-step: 3/3 reached the target by 100 epochs. Seeds: [101, 102, 103]; outcomes: {'reached': 3}. Same-seed repeats are counted separately; stable-recipe seeds were reused from earlier raw/ReLU checks. This supports repeatability across these tested seeds; it does not undo test-target selection.

Confirmation check for frozen-b256-bf16: 1/5 reached the target by 200 epochs. Seeds: [101, 102, 103, 104, 105]; outcomes: {'reached': 1, 'censored': 4}. Same-seed repeats are counted separately; stable-recipe seeds were reused from earlier raw/ReLU checks. The observed successes do not establish a robust recipe across these tested seeds.

Kernel effects that are actually isolated

• opt-speed-eager-tf32-b64-s1 → opt-speed-fused-tf32-b64-s1: same seed, recipe, initialization, dataset and reported NVIDIA A100-SXM4-40GB; 150 epochs take 248.926 → 106.164s of training (2.345×). All scored test trajectories identical: True. Target reached: reference=False, treatment=False. This measures fixed-horizon training speed, not a successful time-to-target ratio.
• opt-speed-eager-tf32-b64-s1 → opt-speed-graph-tf32-b64-s1: same seed, recipe, initialization, dataset and reported NVIDIA A100-SXM4-40GB; 150 epochs take 248.926 → 122.238s of training (2.036×). All scored test trajectories identical: True. Target reached: reference=False, treatment=False. This measures fixed-horizon training speed, not a successful time-to-target ratio.

Output-head diagnostic: digit 6

At seed 104, epoch 5, the paired ReLU-head run predicts zero sixes and correctly classifies 0/958 true sixes. The linear-head run gets 945/958 sixes correct (98.64%). Overall test accuracy changes 88.69% → 97.91%. Initialization, data, implementation, recorded source, GPU and other recipe settings match; only the output ReLU differs. Pairing checks passed: True.

This directly supports an output-head failure in this diagnostic, not a claim that every stalled run has the same cause. The ReLU class 6 preactivation is positive on 1.98% of test inputs (maximum 0.691340), and its last-minibatch head-row gradient norm is 1.48919e-06; the linear head's corresponding norm is 0.170158. Thus “permanently dead output” or “identically zero gradient” would overstate the evidence. The original fixed-seed history could hide this initialization sensitivity.

CUDA graphs reduce replay launch overhead, while fused SGD reduces optimizer orchestration. The relevant evidence here is the matched measurements, not an assumption that these features always help. PyTorch CUDA graphs, SGD implementation choices.

All accuracy attempts

Time columns for successful rows refer to the first target score. For censored/diverged rows they refer to the last evaluated checkpoint and are explicitly not successful target times. Dispatch is always the whole returned call. Diagnostic runs have deliberately shorter horizons; their lack of a target crossing is not directly comparable to a 150/200-epoch search.

All attempts retain source-style raw 0–255 pixels unless their recipe fields say otherwise. Larger batch changes update count and momentum dynamics even when LR and multiplicative shrinkage are scaled by batch size. BF16 changes training arithmetic; evaluation uses the FP32 stored parameters under TF32. Linear heads, unit dropout and normalization are explicit recipe changes. Listed schedule factors multiply both initial LR and initial direct shrinkage, requiring graph recapture; recapture time is excluded from training-loop time and included in invocation time. The six affine layers and 11,972,510 parameters are retained.

First target and preceding observation

The preceding score describes observation cadence; accuracy need not change monotonically, and an unobserved transient earlier within an epoch cannot be ruled out.

Kernel microbenchmarks and compiler cost

These repeatedly update one fixed real minibatch. Three timing repetitions are not three independent training seeds. Setup and steady-state timing are both shown; microbenchmark timings do not establish convergence.

The compiler candidate compiles the model with eager optimizer orchestration; explicit CUDA graph captures the full update. Different capture scope, A100 memory variants and cache history limit cross-run attribution. A large compile/setup cost matters for this short workload even if later replays are faster. PyTorch compile modes, compiler caching.

Confirmation runs

Expected confirmation attempts: 12; all declared attempts complete: True. Missing: none declared/missing.

Target means ± sample SD below include successful seeds only. The attempted/reached denominator and censored/failed counts must accompany those means. Hardware-specific groups and seed-1 repeats versus other confirmation seeds are separate. The preserved raw label fresh-seed means different from exploratory seed 1; stable-recipe seeds 101–103 were already tested with the fragile raw/ReLU recipe.

Timing and interpretation

• training_seconds: Synchronized minibatch loops: gather, graph-input copies, forward/backward, SGD and direct shrinkage. Excludes epoch permutation, evaluation, checkpoint writes, imports, data loading and graph/compiler preparation or schedule-driven recapture.
• run_wall_seconds: Invocation start before benchmark import through availability of this score: includes invocation setup, loading/transfers, graph/compiler preparation, shuffling, training, prior progress writes and test evaluation. Excludes this score's subsequent checkpoint/progress writes, remote dispatch/container startup, image build and final volume commit.
• total_run_seconds: Invocation through post-score result/checkpoint work to its final timer; still excludes driver dispatch/container startup and final volume commit.
• local_dispatch_elapsed_seconds: Driver time from dispatch to returned result, including queue/startup/import/run/final volume commit/transfer. Whole-call time, not an exact timestamp of first target availability.
• setup_seconds: Per-invocation setup until training begins; does not prove a cold process/cache. Container reuse can change this value.
• microbench_step_seconds: Warm repeated-single-batch completed updates measured with synchronization; excludes compiler/setup cost and epoch gather/shuffle. Not time to accuracy.

Container/cache reuse was not recorded as a reliable cold/warm flag. Differences in setup or driver delay must not be credited to SGD, precision or batch size. No cold-process benchmark or energy measurement is claimed.

• Official test outcomes actively guided configuration choices and early stopping. These results are test-target optimization, not unbiased held-out generalization estimates.
• A first qualifying epoch is an observed checkpoint; the preceding evaluation gives temporal resolution but cannot exclude an earlier transient within-epoch crossing.
• Censored means target not observed by the evaluation budget; it does not prove the recipe can never reach it. Missing/failed jobs are not successful fast results.
• Larger batch, BF16, output-head changes, LR and shrinkage scaling alter the optimization recipe. Only matched-recipe comparisons identify kernel implementation effects.
• All rows use unchanged Ciresan widths, but this search has no augmentation and is not the record-setting historical Ciresan training system.
• Reported A100-SXM4-40GB, A100-SXM4-80GB and A100 80GB PCIe devices are distinguished. No hardware-normalized speed inference is made across those variants.
• Confirmation seeds 101–103 differ from exploratory seed 1 but were already used with the fragile raw/ReLU recipe before the stable recipes were selected. Raw metadata fresh-seed means distinct from seed 1, not untouched by this search. These confirmations do not undo test-set-driven selection or make the 10000 examples independent across runs.
• Training, invocation-to-score, whole invocation and driver dispatch clocks answer different questions. None is an energy measurement or invoice.

Completeness and evidence

Accuracy statuses: {'reached': 16, 'censored': 18}. Kernel/compile statuses: {'failed': 3, 'completed': 2}.

The machine-readable summary includes result-byte hashes, effective recipes, initialization/data identity, source hashes when available, first/previous/last evaluations and all failures. It copies no checkpoints, arbitrary remote errors, private paths or credentials. The implementation research and audit documents graph-state restoration, precision-API compatibility and primary references.